TDA4680, Elektronika, elementy
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INTEGRATED CIRCUITS
DATA SHEET
TDA4680
Video processor with automatic
cut-off and white level control
Product specication
Supersedes data of April 1993
File under Integrated Circuits, IC02
1996 Oct 25
Philips Semiconductors
Product specication
Video processor with automatic cut-off
and white level control
TDA4680
FEATURES
·
Operates from an 8 V DC supply
·
Black level clamping of the colour difference, luminance
and RGB input signals with coupling-capacitor DC level
storage
·
Two fully-controlled, analog RGB inputs, selected either
by fast switch signals or via I
2
C-bus
GENERAL DESCRIPTION
·
Saturation, contrast and brightness adjustment via
I
2
C-bus
The TDA4680 is a monolithic integrated circuit with a
colour difference interface for video processing in TV
receivers. Its primary function is to process the luminance
and colour difference signals from multistandard colour
decoders, TDA4555, TDA4650/T, TDA4655/T or
TDA4657, Colour Transient Improvement (CTI) IC,
TDA4565, Picture Signal Improvement (PSI) IC,
TDA4670, or from a feature module.
·
Same RGB output black levels for Y/CD and RGB input
signals
·
Timing pulse generation from either a 2 or 3-level
sandcastle pulse for clamping, horizontal and vertical
synchronization, cut-off and white level timing pulses
·
Automatic cut-off control with picture tube leakage
current compensation
The required input signals are:
·
·
Software-based automatic white level control or fixed
white levels via I
2
C-bus
Luminance and negative colour difference signals
·
2 or 3-level sandcastle pulse for internal timing pulse
generation
·
Cut-off and white level measurement pulses in the last
4 lines of the vertical blanking interval (I
2
C-bus selection
for PAL, SECAM, or NTSC, PAL-M)
I
2
C-bus data and clock signals for microcontroller
control.
Two sets of analog RGB colour signals can also be
inserted, e.g. one from a peritelevision connector and the
other from an on-screen display generator; both inputs are
fully-controlled internally. The TDA4680 includes full
I
2
C-bus control of all parameters and functions with
automatic cut-off and white level control of the picture tube
cathode currents. It provides RGB output signals for the
video output stages.
·
Increased RGB signal bandwidths for progressive scan
and 100 Hz operation (selected via I
2
C-bus)
·
Two switch-on delays to prevent discolouration before
steady-state operation
·
Average beam current and peak drive limiting
·
PAL/SECAM or NTSC matrix selection via I
2
C-bus
·
Three adjustable reference voltage levels (via I
2
C-bus)
for automatic cut-off and white level control
There is a very similar IC TDA4681 available. The only
differences are in the NTSC matrix.
·
Emitter-follower RGB output stages to drive the video
output stages
·
Hue control output for the TDA4555, TDA4650/T,
TDA4655/T or TDA4657.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TDA4680
DIP28
plastic dual in-line package; 28 leads (600 mil)
SOT117-1
TDA4680WP
PLCC28
plastic leaded chip carrier; 28 leads
SOT261-2
1996 Oct 25
2
·
Philips Semiconductors
Product specication
Video processor with automatic cut-off
and white level control
TDA4680
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MIN.
TYP.
MAX. UNIT
V
P
supply voltage (pin 5)
7.2
8.0
8.8
V
I
P
supply current (pin 5)
-
85
-
mA
V
8(p-p)
luminance input (peak-to-peak value)
-
0.45
-
V
V
6(p-p)
-
(B
-
Y) input (peak-to-peak value)
-
1.33
-
V
V
7(p-p)
-
(R
-
Y) input (peak-to-peak value)
-
1.05
-
V
V
14
3-level sandcastle pulse
H+V
-
2.5
-
V
H
-
4.5
-
V
BK
-
8.0
-
V
2-level sandcastle pulse
H+V
-
2.5
-
V
BK
-
4.5
-
V
V
i(p-p)
RGB input signals at pins 2, 3, 4, 10, 11 and 12 (peak-to-peak value)
-
0.7
-
V
V
o(b-w)
RGB outputs at pins 24, 22 and 20 (black-to-white value)
-
2.0
-
V
T
amb
operating ambient temperature
0
-
70
°
C
1996 Oct 25
3
hue control voltage
PONRES, CB0 and CB1,
CG0 and CG1, CR0 and CR1
26
leakage,
cut-off and
white level
current
input
RAR
3 x 2-BIT
WHITE LEVEL
REGISTERS
AND
PONRES
SDA
A75 to A70, A85 to A80, A95 to A90
27
3 x 6-BIT
REFERENCE
REGISTERS,
D/A CONVERTER
I
2
C-bus
I
2
C-BUS
TRANSCEIVER
A45 to A40, A55 to A50, A65 to A60
SCL
28
AA5 to AA0
A05 to A00, A15 to A10, A25 to A20, A35 to A30
white
level
control
6-BIT D/A
CONVERTER
cut-off
control
19
BREN
1ST AND 2ND
SWITCH-ON
DELAYS
WHITE LEVEL
AND CUT-OFF
COMPARATORS
R
W
R
C
TDA4680
18
sandcastle
pulse
14
BK
H + V
(H)
17
leakage
storage
SANDCASTLE
PULSE
DETECTOR
SC5
DELOF
TIMING
GENERATOR
16
peak drive
limiting
storage
BCOF, FSBL, FSWL, WPEN,
VBW2, VBW1, VBW0
SATOF
PEAK DRIVE
AND
AVERAGE
BEAM CURRENT
LIMITING
2 x 8-BIT
CONTROL
REGISTERS
timing
pulses
15
average
beam
current
FSDIS2, FSON2,
FSDIS1, FSON1
FSW
1
13
NMEN
R
G
B
1
10
11
12
Y-MATRIX
4 x 6-BIT
D/A
CONVERTERS
3 x 6-BIT
D/A
CONVERTERS
1
1
BCOF
Y
8
7
6
R
G
B
R
G
B
R
G
B
BRIGHTNESS
ADJUST,
BLANKING 2,
MEASUREMENT
PULSES
R
G
B
R
G
B
24
22
20
R
G
B
CUT-OFF
ADJUST,
OUTPUT
STAGES
-
(R
-
Y)
PAL/SECAM,
NTSC
MATRIX
FAST SIGNAL
SOURCE SWITCH,
BLANKING 1
SATURATION
AND CONTRAST
ADJUST
WHITE
POINT
ADJUST
RGB
outputs
-
(B
-
Y)
FSW
2
1
R
G
B
2
2
3
4
2
SUPPLY
2
5
9
21
23
25
MED693
B
G
R
I
2
C-bus data and
control signals
V = 8 V
P
cut-off storage
Fig.1 Block diagram.
Philips Semiconductors
Product specication
Video processor with automatic cut-off
and white level control
TDA4680
PINNING
SYMBOL PIN
DESCRIPTION
SYMBOL PIN
DESCRIPTION
FSW
2
1 fast switch 2 input
C
PDL
16
storage capacitor for peak drive
limiting
R
2
2 red input 2
C
L
17 storage capacitor for leakage current
G
2
3 green input 2
WI
18 white level measurement input
B
2
4 blue input 2
CI
19 cut-off measurement input
V
P
5 supply voltage
B
O
20 blue output
-
(B
-
Y)
6 colour difference input
-
(B
-
Y)
C
B
21 blue cut-off storage capacitor
-
(R
-
Y)
7 colour difference input
-
(R
-
Y)
G
O
22 green output
Y
8 luminance input
C
G
23 green cut-off storage capacitor
GND
9 ground
R
O
24 red output
R
1
10 red input 1
C
R
25 red cut-off storage capacitor
G
1
11 green input 1
HUE
26 hue control output
B
1
12 blue input 1
SDA
27 I
2
C-bus serial data input/output
FSW
1
13 fast switch 1 input
SCL
28 I
2
C-bus serial clock input
SC
14 sandcastle pulse input
BCL
15 average beam current limiting input
handbook, halfpage
FSW
2
1
28
SCL
R
2
2
27
SDA
G
2
3
26
HUE
B
2
V
P
4
25
C
R
R
O
C
G
G
O
C
B
B
O
V
P
5
25
C
R
-
(B
-
Y)
6
24
R
O
5
24
-
(R
-
Y)
7
23
C
G
-
(B
-
Y)
6
23
Y
8
TDA4680WP
22
G
O
C
B
B
O
CI
-
(R
-
Y)
7
22
TDA4680
GND
9
21
Y
8
21
GND
9
20
R
1
G
1
10
20
11
19
R
1
10
19
CI
G
1
11
18
WI
MED695
B
1
12
17
C
L
FSW
1
13
16
C
PDL
BCL
SC
14
15
MED694
Fig.2 Pin configuration for DIP-version.
Fig.3 Pin configuration for PLCC-version.
1996 Oct 25
5
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